;***************************************************************************
;* Title: AVR mega48 based nixie clock 1.0
;* Commercial use forbidden without license from author.  
;* (c) copyright 2005 Henry Carl Ott N2RVQ, All Rights Reserved.
;* Questions, comments or offers of cash? carlott@rcn.net  http://users.rcn.com/carlott/
;***************************************************************************
;* Description:
;* A single chip 4 digit nixie clock.
;* PWM used for HV generation. RTC function maintained in power down mode.
;* see seperate schematic for circuit details.
;***************************************************************************
;* Revision List:
;* 1.0  Initial release  ; not optimized, some routine stubbs
;***************************************************************************
;* Fuses:
;* internal 8mhz osc

.nolist
.include "m48def.inc"	
.list
.listmac

;***************************************************************************
;*
;* MACROS
;*
;***************************************************************************

;--- load z pointer with arg
.macro _init_z
	ldi	zh,high(@0)
     	ldi	zl,low(@0) 	
.endm	

;--- load y pointer with arg
.macro _init_y
	ldi	yh,high(@0)
	ldi	yl,low(@0) 	
.endm	

.macro _init_x
	ldi	xh,high(@0)
    ldi	xl,low(@0) 	
.endm	

;--- load eeaddr hi/lo with arg
.macro _init_ee
	ldi	xl,low(@0)
	ldi	xh,high(@0) 	
.endm	


;--- load z pointer with arg*2 for flash stored data (convert byte to word pointer) 
.macro	_init_zflash
		ldi	zh,high(@0 * 2)
   		ldi	zl,low(@0 * 2) 	;Init Z-pointer
.endm	

;--- load x pointer with arg*2 for flash stored data (convert byte to word pointer) 
.macro	_init_xflash
		ldi	xh,high(@0 * 2)
    	ldi	xl,low(@0 * 2) 	;Init x-pointer
.endm	

;--- skip next instruction
.macro	skip
	rjmp	(pc + 2)	; skip, next instruction	
.endm	


;------delay two cycles in one instruction
.macro	_nop_2
		rjmp	(pc + 1)
.endm	


;**************************************************************************
;     ATmega48 pin out
;                                                          
;
;**************************************************************************
;--- port and pin defines

;PORTB
.equ	K_7			= 0x00 	; 
.equ	K_PM		= 0x01	; 
.equ	K_4			= 0x02	; 
.equ	ANODE_HH	= 0x03	; 
.equ	ANODE_H		= 0x04	; 
.equ	K_6			= 0x05	; 
.equ	PB6_NC		= 0x06	
.equ	PB7_NC		= 0x07	

;PORTC
.equ	K_9			= 0x00 	
.equ	ANODE_M		= 0x01	
.equ	K_8			= 0x02	
.equ	HV_SENSE	= 0x03	
.equ	K_0			= 0x04	
.equ	K_1			= 0x05	
.equ	PC6_NC		= 0x06	
.equ	PC7_NC		= 0x07	


;PORTD
.equ	PB_PORT		= PIND

.equ	K_2			= 0x00
.equ	K_3 		= 0x01
.equ	ANODE_MM	= 0x02	
.equ	PB_2		= 0x03	
.equ	PB_1		= 0x04	
.equ	PWM			= 0x05	
.equ	K_5			= 0x06	
.equ	LV_SENSE	= 0x07	

;---- some program equates and constants
.equ	clock 		= 8000000	; cpu clock
.equ	pwm_start_val	= 0x37	; starting pwm value
.equ	pwm_max_val	= 0xf0		; max pwm val 

.equ	hv_reg_val	= 8 		; hv adc regulation point  

.equ	blank		= 11		; value to blank display
.equ	secs_display= 8			; number of seconds to display seconds when pb_2 is pressed
.equ	fade_rate	= 65		; delay of tics for cross fade
.equ	blink_bit	= 5			; bit mask used to blink digits

.equ	t1_reload	= 0x1400	; timer 1 reload values

;-------------------------------------
.equ	T0_DIV1		=$01	;
.equ	T0_DIV8		=$02	;
.equ	T0_DIV64	=$03	;
.equ	T0_DIV256	=$04	;
.equ	T0_DIV1024	=$05	;

.equ	T1_DIV1		=$01	;
.equ	T1_DIV8		=$02	;
.equ	T1_DIV64	=$03	;
.equ	T1_DIV256	=$04	;
.equ	T1_DIV1024	=$05	;

.equ	T2_OFF		=$00
.equ	T2_DIV1		=$01	;
.equ	T2_DIV8		=$02	;
.equ	T2_DIV32	=$03
.equ	T2_DIV64	=$04	;
.equ	T2_DIV128	=$05
.equ	T2_DIV256	=$06	;
.equ	T2_DIV1024	=$07	;

;*****************************
;* Global Register Variables *
;*****************************

.def	tic			= r02	
.def	xfade		= r03	; crossfade
.def	hv_target 	= r04 	; value to compare adc value to

.def	isr_save	= r14	; isr storage for status word
.def	zero		= r15	; always zero,  handy for 16 bit math, 	

.def	temp		= r16	; gp working reg 	
.def	temp2		= r17	; another gp reg
.def	ii			= r19

.def	sys_flags	= r20	; system bit flags, explained below 
.def	clk_flags	= r21	; clock options, defined below 

;**************************
;-  system bit flags defined
;**************************
.equ	blink_hh	= 0x00		; set to blink tens of hours	
.equ	blink_h		= 0x01
.equ	blink_mm	= 0x02
.equ	blink_m		= 0x03

.equ	colon_on	= 0x05		; set to light colon
.equ	pm_on		= 0x06		; set to light pm indicator
.equ	debug		= 0x07		; set debug mode
;-------------------------


;**************************
;-  clock bit flags defined
;**************************
.equ	_12hr		= 0x01		; twelve hour display format
.equ	clk_halt	= 0x02		; set to halt rtc
.equ	sec			= 0x04		; bits set by rtc routine
.equ	min			= 0x05
.equ	hour		= 0x06
.equ	day			= 0x07	


.DSEG
_seconds:			.byte	1
_minutes:			.byte	1
_hours:				.byte	1
_day:				.byte	1
_date:				.byte	1
_month:				.byte	1	
_year:				.byte	1

_count_a:			.byte	1		; vertical counter storage for next sample
_count_b:			.byte	1
_debounced:			.byte	1		; debounced status of inputs	
_pb:				.byte	1		; push button events, bits set by button press

_disp_buff:			.byte	4		; storage for display buffer hh:mm
_disp_buffz:		.byte	4		; zbuffer for display cross fading

;-------------------------

;*********************
;* Interrupt Vectors *
;*********************

.CSEG
.org		0x00
			rjmp	reset		; Reset Handle	
.org		INT0addr			; external int 0 ; 1hz int from rtc chip
			rjmp	reset
.org		INT1addr			; external int 1
			rjmp	reset
.org		PCI0addr
			rjmp	reset
.org		PCI1addr
			rjmp	reset
.org		PCI2addr
			rjmp	reset
.org		OVF2addr			; Overflow2 Interrupt Vector Address
			rjmp	t2_isr
.org		oc1aaddr
			rjmp	t1_isr
.org		OVF1addr			; Overflow1 Interrupt Vector Address
			rjmp	reset
.org		OVF0addr
			rjmp	reset
.org		ADCCaddr
			rjmp	adc_isr


;--- hits about 1500 hz, handle display mux, debounce push buttons
t1_isr:		in		isr_save, sreg			; save status reg
			push	temp
			push	temp2
			push	zl
			push	zh						; and some work registers
	
			inc		tic

			mov		temp,tic
			andi	temp,0x3f				; mask how often to check adc				
			brne	tst_db					; not this time	
			
			lds		temp,ADCSRA				; start a conversion
			sbr		temp,1<<ADSC
			sts		ADCSRA,temp

tst_db:		sbrc	tic,0					
			rcall	debounce				; debounce buttons every other scan

scan:		out		PORTB,zero				; clear all outputs
			out		PORTC,zero
			ldi		temp,1<<PB_1 | 1<<PB_2	; leave pull ups for buttons
			out		PORTD,temp
	
			mov		temp,tic				; get copy of tic
			lsr		temp					; low 3 bits used for crossfading
			lsr		temp
			lsr		temp
			andi	temp,0x03				; 0-4

			_init_z	_disp_buff				; point to display buffer

ten_hours:	cpi		temp,0					; first digit	
			brne	hours			
		
			sbi		PORTB,ANODE_HH			; turn on anode (hv)

			sbrc	sys_flags,pm_on			; pm indicator is on the hours anode
			sbi		PORTB,k_pm

			sbrc	sys_flags,blink_hh		; blink?
			rjmp	blink

			rjmp	xfadeing					

hours:		adiw	zl,1					; point to next data location

			cpi		temp,1
			brne	ten_mins
			
			sbi		PORTB,ANODE_H
			
			sbrc	sys_flags,colon_on		
			sbi		PORTB,k_pm

			sbrc	sys_flags,blink_h				; blink?
			rjmp	blink

			rjmp	xfadeing

ten_mins:	adiw	zl,1

			cpi		temp,2
			brne	mins
	
			sbi		PORTD,ANODE_MM
			
			sbrc	sys_flags,blink_mm				; blink?
			rjmp	blink		

			rjmp	xfadeing

mins:		adiw	zl,1	
			sbi		PORTC,ANODE_M
			
			sbrs	sys_flags,blink_m				; blink?
			rjmp	xfadeing						

blink:		ldi		temp,blank						
			sbrc	tic,blink_bit					; blamk digit at rate
			rjmp	scan_disp		


xfadeing:	mov		temp2,tic						; get low 3 bits of tic
			andi	temp2,0x07						; mask off unwanted
			
			cp		temp2,xfade						; compare with xfade value
			brsh	pc + 2
			adiw	zl,4							; change to point to zbuffer
			ld		temp,z							; get the data 
				
scan_disp:	rcall	disp_nixie


t1_isr_end:	pop		zh
			pop		zl
			pop		temp2
			pop		temp
			out		sreg,isr_save
			reti

;--- 1hz async from 32khc xtal
t2_isr:		in		isr_save,SREG					; save status					

			push	temp							; save work regs
			push	temp2
			push	zl
			push	zh

			rcall	rtc_update						; update time

t2_isr_end:	pop		zh								; restore
			pop		zl
			pop		temp2
			pop		temp	
		
			out		SREG,isr_save
			reti

;--- adc int, 
adc_isr:	in		isr_save, sreg				; save sreg
			push	temp

adc_1:		lds		temp,ADCH					; get 8 bits of adc data
			cp		temp,hv_target				; compare to target value
					
			breq	adc_isr_end					; close enough

			in		temp,OCR0B					; get current pwm val (does not effect flags)

			brlo	inc_pwm						; up or down?
		
dec_pwm:	dec		temp	
			rjmp	updt_pwm

inc_pwm:	cpi		temp,pwm_max_val
			brsh	adc_isr_end					; maxed out, don't change	
			inc		temp

updt_pwm:	out		OCR0B,temp


adc_isr_end:pop		temp
			out		sreg,isr_save
			reti

;------------------------------------------------------------------------
;--- start here on power up or external reset
;--- init ports, ints, and  zero all registers 		
reset:		ldi		temp,0
			_init_z	0x00						; bottom of registers	

clr_reg:	st		z+,temp 
			cpi		zl,0x1e						; don't zero z reg
			brne	clr_reg
	
			_init_z	_year+1						; beginning of ram past time storage

clr_ram:	st		z+,r16						; 	
			cpi		zl,LOW(RAMEND) 
			brne	clr_ram		
			cpi		zh,HIGH(RAMEND)
			brne	clr_ram	 	


;--- init stack pointer (somewhat important)
			ldi		temp,LOW(RAMEND) 	;setup stack pointer
			out		SPL,temp
			ldi		temp,HIGH(RAMEND)
			out		SPH,temp

;--- PORTB setup						
			ldi		temp,1<<K_7 | 1<<K_PM | 1<<K_4 | 1<<ANODE_HH | 1<<ANODE_H | 1<<K_6
			out		DDRB,temp			
			ldi		temp,0x00
			out		PORTB,temp				
	
;--- PORTC setup
			ldi		temp,1<<K_9 | 1<<ANODE_M | 1<<K_8 | 1<<K_0 | 1<<K_1
			out		DDRC,temp
			ldi		temp,00		;  		
			out		PORTC,temp

;--- PORTD setup
			ldi		temp,1<<K_2 | 1<<K_3 | 1<<ANODE_MM | 1<<PWM | 1<<K_5
			out		DDRD,temp
			ldi		temp,1<<PB_1 | 1<<PB_2  							; pull ups on push buttons	 
			out		PORTD,temp

;*******************************************************************
;--- set up timer 2							32khc xtal, 1hz int
			ldi		temp,1<<AS2
			sts		ASSR,temp
 
			sts		TCNT2,zero
			ldi		temp,T2_DIV128			; timer2  prescaler (128)
			sts		TCCR2B,temp

t2_lp:		lds		temp,ASSR				; wait till all busy bits clear
			andi	temp,0x0f
			brne	t2_lp

			ldi		temp,1<<TOIE2			; enable ints on overflow
			sts		TIMSK2,temp		
	
;*******************************************************************
;--- set up timer 0  pwm mode  	
	
			ldi		temp,pwm_start_val
			out		OCR0B,temp		; set low	to start		; higher values = more energy

			ldi		temp,T0_DIV1								; 
			out		TCCR0B,temp									; Set the prescaler

			ldi		temp,1<<COM0B1 |  0<<WGM01 | 1<<WGM00		; set mode pwm 
			out		TCCR0A,temp


;*******************************************************************
;--- set up timer 1  

			ldi		temp,1<<CS10 | 1<<wgm12						; div1 ctc mode
			sts		TCCR1B,temp

			ldi		temp,high(t1_reload)
			sts		OCR1AH,temp									; ctc top match
			ldi		temp,low(t1_reload)
			sts		OCR1AL,temp

			ldi		temp,1<<OCIE1A
			sts		TIMSK1,temp

;*******************************************************************
;--- set up adc
			rcall	init_adc

;----------------------------------------------------------------------------
;--- enable watch dog timer
;		wdr
;		ldi	temp,(1<<WDE)|(1<<WDP2)|(1<<WDP1)|(1<<WDP0) ; turn on watch dog time, longest timeout
;		out	WDTCR,temp

;-----------------------------------------------------------------------------
;--- init vars 
													 	
			ldi		temp,1<<PB_1 | 1<<PB_2  			; pull ups for push buttons	 
			out		PORTD,temp							; get initial button status	
			in		temp,PB_PORT						; sample input pins
			andi 	temp,1<<PB_1 | 1<<PB_2 				; mask off pins we don't care about
			sts		_debounced,temp						; save it
			
			ldi		temp,0xc0							; set initial high voltage target 
			mov		hv_target,temp
			sei											; turn on ints

			rcall	get_hv_val							; get target val from eeprom into ram

main:		sbis	PIND,LV_SENSE						; check power status
			rjmp	pwr_down

			rcall	get_button
			brcc	time_updt							; nothing pressed, display time	

			cpi		temp,1<<PB_1						; jump to cfg mode
			brne	pc + 2
			rcall	cfg_top

			cpi		temp,1<<PB_2						; disp seconds for a short period of time
			brne	main
			rcall	disp_seconds

;--- main time display
time_updt:	sbrc	clk_flags,hour
			rcall	hour_events
				
			sbrc	clk_flags,min						;
			rcall	min_events							;

			sbrc	clk_flags,sec						; wait for isr to set second bit	
			rcall	sec_events							; not yet
			rjmp	main

hour_events:
			lds		temp,_hours
			cpi		temp,5								; at 5AM run the cathode saver		
			brne	pc + 2
			rcall	cathode_saver						; at 5 am cycle all cathodes
			cbr		clk_flags,1<<hour
			ret

min_events:
			_init_y	_disp_buffz							; point to display buffer					
			rcall	disp_hhmm							; update display
			rcall	fade								; fade in new time
			cbr		clk_flags,1<<min
			ret

sec_events:
			ldi		temp,1<<colon_on					; blink colon 1/2 hz
			eor		sys_flags,temp				
			cbr		clk_flags,1<<sec
			ret


;---- display properly formatted time on 4 digit display
disp_hhmm:	lds		temp,_hours					; get hours

			sbrs	clk_flags,_12hr				; check format

			rjmp	disp_h						; just display in 24hr format

			cpi		temp,12						; am/pm?
			brlo	disp_am						; it's the morning

disp_pm:	sbr		sys_flags,1<<pm_on			; light indicator	
			subi	temp,12
			skip								; avoid pm indicator

disp_am:	cbr		sys_flags,1<<pm_on			; clear	
			tst		temp						; test for 12 am
			brne	pc + 2
			ldi		temp,12

			cpi		temp,10						; leading zero suppression
			brsh	disp_h						; 10,11,12, just display it normally	
					
			ldi		temp2,blank					; blank first digit
			st		y+,temp2					; hh
			st		y+,temp						; store h

			rjmp	disp_mins	 			

disp_h:		rcall	disp_bin

disp_mins:	lds		temp,_minutes	
			rcall	disp_bin
			ret
			
;--- display seconds
disp_seconds:
			ldi		ii,secs_display						; how long to display seconds
			cbr		sys_flags, 1<<pm_on | 1<<colon_on	; clear colon & pm			

disp_s_top:	_init_y	_disp_buffz							; point to buffer	

			ldi		temp,blank
			st		y+,temp								; blank first two digits (hh)
			st		y+,temp
	
			lds		temp,_seconds						; get seconds from rtc
			rcall	disp_bin							; put in buffer
			rcall	fade								; fade it in

disp_s_lp:	sbis	PIND,LV_SENSE						; quick test for power fail
			ret 

			rcall	get_button							; check for early exit
			brcs	disp_end

disp_s_a:	sbrs	clk_flags,sec						; update sec display once a second
			rjmp	disp_s_lp
			cbr		clk_flags,1<<sec
		
			dec		ii									; done yet?
			brne	disp_s_top							; nope
			
disp_end:	sbr		clk_flags,1<<min					; for quick display update in main 
			ret						


;--- power down, reduce power to minimum, 1hz isr will wake us up, update rtc  
pwr_down:	out		TCCR0B,zero							; kill counter 0/pwm
			out		TCCR0A,zero
			sts		TCCR1B,zero							; kill counter 1/ctc				
			
			out		PORTB,zero							; zero out the ports
			out		PORTC,zero		
			out		PORTD,zero

			sts		ADMUX,zero							; kill the adc
			sts		ADCSRA,zero

			ldi		temp,1<<PRTWI	| 1<<PRSPI			; turn off twi (spi should already be off)
			sts		PRR,temp

			ldi		temp,1<<ACD							; kill analog comparator and bandgap												
			out		ACSR,temp	


			ldi		temp,0<<SM2 | 1<<SM1 | 1<<SM0 | 1<<SE	; set power save mode
			out		SMCR,temp
		
pwr_down_a:	sleep										; 
			nop											; first  instructions after wakeup
		
			sts		OCR2A,zero							; a dummy write	

pwr_tmr_lp:	lds		temp,ASSR							; wait till all busy bits clear
			andi	temp,0x1f
			brne	pwr_tmr_lp							; need tmr2 to update in async mode  or we'll get multiple ints

			sbis	PIND,LV_SENSE						; see if power is back
			rjmp	pwr_down_a							; nope go back to sleep  
		

wake_up:	out		SMCR,zero							;  disable sleep mode	

			ldi		temp,1<<PB_1 | 1<<PB_2  			; pull ups for pb	 
			out		PORTD,temp

			ldi		temp,T0_DIV1						; timer 0 
			out		TCCR0B,temp							; 

			ldi		temp,1<<COM0B1 |  0<<WGM01 | 1<<WGM00		; set mode pwm 
			out		TCCR0A,temp

			ldi		temp,1<<CS10 | 1<<wgm12				; timer 1
			sts		TCCR1B,temp

			rcall	init_adc							; turn on adc			

			sbr		clk_flags,1<<min
			rjmp	main								;	 


;--- set up adc, free running channel for HV 
init_adc:
			ldi		temp,1<<ADC3D												; turn off digital buffer on pin
			sts		DIDR0,temp	

			ldi		temp,1<<REFS0 | 1<<REFS1  | 1<<MUX1 | 1<<MUX0 | 1<<ADLAR	  ; internal bandgap reference 1.1 v (nominal)	
			sts		ADMUX,temp

			ldi		temp,1<<ADEN | 1<<ADIE | 1<<ADPS2 | 0<<ADPS1 | 1<ADPS0  	  ; enable ints, prescale	clk/32 		
			sts		ADCSRA,temp
			
			ret


;--- cfg mode, hours
;----------------------------------------
cfg_top:	sbr		clk_flags,1<<clk_halt				; stop clock

cfg_hour:	cbr		sys_flags,1<<colon_on				; turn off colon for config
			sbr		sys_flags,1<<blink_hh | 1<<blink_h	; blink hh
			
			_init_y	_disp_buff							; point to display buffer
			rcall	disp_hhmm							; put time on display

			rcall	get_button							; any press?
			brcc	cfg_hour	
	
			cpi		temp,1<<pb_1						; button 1?
			breq	cfg_min								; next cfg mode
			
			lds		temp,_hours							; get hours
			inc		temp								; ++
			cpi		temp,24								; test for rollover
			brlo	pc + 2
			clr		temp			
			sts		_hours,temp							; save
			rjmp	cfg_hour							; loop

;--- minutes			
cfg_min:	sbr		sys_flags,1<<blink_mm | 1<<blink_m		; blink  mm
			cbr		sys_flags,1<<blink_hh | 1<<blink_h		; no blink hh
			
			_init_y	_disp_buff								; diplay time
			rcall	disp_hhmm
			
			rcall	get_button
			brcc	cfg_min
	
			cpi		temp,1<<pb_1	
			breq	cfg_24										; next

			sts		_seconds,zero								; minutes changed , zero seconds
			
			lds		temp,_minutes								; get minutes
			inc		temp
			cpi		temp,60										; handle rollover
			brlo	pc + 2
			clr		temp
			sts		_minutes,temp								; save
			rjmp	cfg_min		 								; loop


;--- config 24 / 12 hour mode
cfg_24:		cbr		sys_flags,1<<blink_hh | 1<<blink_h | 1<<blink_mm | 1<<blink_m 	;  unblink

			ldi		temp,24										; assume 24 mode
			sbrs	clk_flags,_12hr
			rjmp	_d24	

_d12:		sbr		sys_flags,1<<pm_on							; update pm indicator	
			ldi		temp,12
			rjmp	_d24_d	
			
_d24:		cbr		sys_flags,1<<pm_on							; update		
			ldi		temp,24

_d24_d:		rcall	disp_bin_ss									; display 12/24 on mm

cfg_24_lp:	rcall	get_button		
			brcc	cfg_24_lp									; no press, loop  
	
			cpi		temp,1<<pb_1								; next cfg mode
			breq	cfg_hv
													
			ldi		temp,1<<_12hr								; invert bit
			eor		clk_flags,temp

			rjmp	cfg_24										; loop


;--- adjust hv target value 0-15 
cfg_hv:		cbr		sys_flags,1<<blink_hh | 1<<blink_h | 1<<blink_mm | 1<<blink_m 	;  unblink
			sbr		sys_flags,1<<colon_on
			_init_ee	_hv_point									; get hv regualtion value from eeprom
			rcall	eerd	
			rcall	disp_bin_ss

cfg_hv_lp:	rcall	get_button		
			brcc	cfg_hv_lp									; no press, loop  
	
			cpi		temp,1<<pb_1								; next cfg mode
			breq	cfg_exit
										
			_init_ee	_hv_point									; get hv regualtion value from eeprom
			rcall	eerd	
			inc		temp

			andi	temp,0x0f									; only low four bits	
			rcall	eewr										; save it

			rcall	get_hv_val									; update reg for isr	
			rjmp	cfg_hv										; loop

cfg_exit:	cbr		sys_flags,1<<blink_hh | 1<<blink_h | 1<<blink_mm | 1<<blink_m | 1<<pm_on 
			cbr		clk_flags,1<<clk_halt		; enable clock	
			sbr		clk_flags,1<<min			; for quick display update in main 
			ret


;--- just go through all digits to try to prevent cathode poisoning
;--- unclear if this tactic actually works
cathode_saver:
			clr		ii
			cbr		clk_flags,1<<sec		

cathode_lp:	sbis	PIND,LV_SENSE						; check power	
			ret											; quick return on power fail
			
			_init_y	_disp_buff
			mov		temp,ii
			rcall	disp_bin			
			mov		temp,ii
			rcall	disp_bin

			sbrs	clk_flags,sec
			rjmp	cathode_lp	

			cbr		clk_flags,1<<sec
			subi	ii,-11
			cpi		ii,110
			brne	cathode_lp
			
			sbr		clk_flags,1<<min					; quick display update
			ret


;--- cross fade	from buffz to buff, then copy data from zbuffer to primary buffer
fade:		clr		xfade
		
fade_lp:	ldi		temp,fade_rate								; how fast to fade
			rcall	delay_tic								

fade_a:		inc		xfade										
			sbrs	xfade,3										; 7 levels
			rjmp	fade_lp										; loop	

			_init_z	_disp_buff									; copy data to primary disp buffer
			ldi		temp2,4										; 4 bytes to copy

fade_c_lp:	ldd		temp,z+4									; get
			st		z+,temp										; save
			
			dec		temp2
			brne	fade_c_lp									; loop
				
			clr		xfade										; display the primary buffer 100% duty cycle

			ret
 
;----------------------------------------
;--- call once a second
;--- trash temp,temp2,z
rtc_update:	sbrc	clk_flags,clk_halt		; if in config mode, don't update time
			ret

			sbr		clk_flags,1<<sec		; set seconds flag, clear in main	
			_init_z	_seconds				; point to seconds

rtc_seconds:ld		temp,z					; get seconds
			inc		temp
			cpi		temp,60
			breq	rtc_umin
			st		z,temp					; save seconds
			ret	

rtc_umin:	sbr		clk_flags,1<<min		; set every minute
			st		z,zero					; zero / store seconds
			ldd		temp,z+1				; get minutes
			inc		temp
			cpi		temp,60					; hour passed	
			breq	rtc_uhour	 		
			std		z+1,temp				; just save minutes	
			ret

rtc_uhour:	sbr		clk_flags,1<<hour		; hour lag bit
			std		z+1,zero				; zero / store minutes	
			ldd		temp,z+2				; get hours
			inc		temp
			cpi		temp,24					; day passed?
			breq	rtc_uday	
			std		z+2,temp				; save hours			
			ret

rtc_uday:	sbr		clk_flags,1<<day
			std		z+2,zero				; zero / store hours	


;--- don't need day/date support on this clock, just return
			ret

			ldd		temp,z+3				; get day of week 1-7	
			inc		temp		
			sbrc	temp,3					; 8 ?
			ldi		temp,1					; reset to 1
			std		z+3,temp				; save	

rtc_udate:	rcall	days_in_month			; get max days in the current month, adjusted for leap years
			ldd		temp2,z+4				; get date
			inc		temp2					; bump date
			cp		temp,temp2				; days in month > date ?
			brmi	rtc_umonth				; no

			std		z+4,temp2				; save date
			ret

rtc_umonth:	ldi		temp,1
			std		z+4,temp				; reset date

			ldd		temp,z+5				; get month
			inc		temp
			cpi		temp,13
			breq	rtc_uyear			
			std		z+5,temp
			ret

rtc_uyear:	ldi		temp,1		; roll over month to jan	
			std		z+5,temp	; save it
		
			ldd		temp,z+6	; get year
			inc		temp
			std		z+6,temp

rtc_exit:	ret
			
		
;--- return leap year corrected days in month
; return in temp, trash temp2 
days_in_month:
			ldd	temp,z+5	; get month	
			dec	temp			; 1-12  to 0-11

			push	zl			; save our time pointer
			push	zh

			_init_zflash	_month_table	

			add		zl,temp		; adjust pointer
			adc		zh,zero
			lpm		temp,z		; get month data

			pop		zh			; restore pointer
			pop		zl

			cpi		temp,28		; feb?
			breq	test_leap	
			ret					; no, just return	

test_leap:	ldd		temp2,z+6	; get year
			andi	temp2,3		; see if low two bits are zero (divide by 4)	
			brne	pc + 2		; no, not a leap year
			inc		temp			; 29 days in feb in a leap year
days_in_m_end:
			ret

_month_table:	.db	31,28,31,30,31,30,31,31,30,31,30,31


;--- disp temp 0-255 
;--- trash temp,temp2,ii
disp_bin_hss:
			_init_y	_disp_buff
			ldi		temp2,blank
			st		y+,temp2	

			ldi		temp2,100	; hunds
			rcall	sub_it

			ldi		temp2,10	; tens
			rcall	sub_it
				
			mov		ii,temp
			rjmp	sub_it_a		; ones	
	
sub_it:		clr		ii				; start at zero

sub_it_lp:	cp		temp,temp2		; see if we can sub without a carry
			brlo	sub_it_a		; no, done with this loop	
			sub		temp,temp2
	
			inc		ii				; bump loop counter (in ascii)
			rjmp	sub_it_lp		; loop again

sub_it_a:	st		y+,ii			; save it
sub_it_end:	ret


;--- display temp; on ss, blank hh
disp_bin_ss:
			_init_y		_disp_buff
			push	temp							; save temp	
			ldi		temp,blank						; blank hh
			st		y+,temp
			st		y+,temp
			pop		temp

;--- display temp as two bcd digits @ y
disp_bin:	rcall	bin2bcd							; convert temp
			st		y+,temp2						; temp2 has msd
			andi	temp,0x0f						; mask off any unwanted bits
			st		y+,temp							; save it
			ret


;--- convert temp into correct output port and pin
disp_nixie:	cpi		temp,10
			brsh	disp_nix_end				; display nothing	
			_init_zflash _disp_table
			
			lsl		temp						; mul x2, table is in words
			add		zl,temp						; set pointer
			adc		zh,zero						; handle carry

			lpm		temp,z+						; get port addr
			lpm		temp2,z						; get bit mask	

			clr		zh							;
			mov		zl,temp						; point to port
			ld		temp,z						; get current port value
			or		temp,temp2					; set bit
			st		z,temp						; back out to pins

disp_nix_end:
			ret

;-- table contais port address and bit mask for each anode
_disp_table:	.db	PORTC + 0x20,1<<K_0	; 0 C4
				.db	PORTC + 0x20,1<<K_1	; 1 C5	
				.db	PORTD + 0x20,1<<K_2	; 2 D0	
				.db	PORTD + 0x20,1<<K_3	; 3 D1
				.db	PORTB + 0x20,1<<K_4	; 4 B2
				.db	PORTD + 0x20,1<<K_5	; 5 D6
				.db	PORTB + 0x20,1<<K_6	; 6 B5
				.db	PORTB + 0x20,1<<K_7	; 7 B0
				.db PORTC + 0x20,1<<K_8	; 8 C2
				.db PORTC + 0x20,1<<K_9	; 9 C0

;--- get hv target value from eeprom (0-f), mul 8 add 0x80 , get calculated value 80-7f      
get_hv_val:	_init_ee	_hv_point					; get hv regualtion value from eeprom
			rcall	eerd	
			andi	temp,0x0f						; only low four bits

			lsl		temp							; mul x 8
			lsl		temp
			lsl		temp

			subi	temp,-0x80						; add 0x80			
			mov		hv_target,temp					; mov to comapare reg
			ret

;----
disp_temp:	push	temp	
			rcall	disp_bin_hss		

			rcall	get_button		
			brcc	pc - 1							; no press, loop  
			
			pop		temp
			ret

;--- debugging, blip pin
blip:

			cbi		PORTD,PB_2
			sbi		DDRD,PB_2				
			nop
			nop
			nop	
			sbi		PORTD,PB_2
			cbi		DDRD,PB_2

			ret

;--- delay temp number of system timer tics
;--- may go short  < tic 
delay_tic:	add		temp,tic

del_tic_lp:	sbis	PIND,LV_SENSE						; check power	
			ret											; quick out

			cp		temp,tic
			brne	del_tic_lp
			ret	

;----------------------------------------------
;--- convert temp to packed bcd results in temp
;--- msd also returned in low nibble of temp2 
;-------------------------------------------------------------------------------------
bin2bcd:	clr		temp2							; clear msd
b2bcd_1:	subi	temp,10							; sub 10
			brcs	b2bcd_2							; abort on carry 
			subi	temp2,-0x10						; add 0x10 to msd
			rjmp	b2bcd_1							; again

b2bcd_2:	subi	temp,-10						; un do last sub
			add		temp,temp2						; add msd to lsd	
			swap	temp2							; swap msd to low nibble
			ret

;------------------------------------------------------------------------------
;--- basic eeprom support, x contains eeaddr
eewr_zero_p:	clr	temp			; stub to write zero at current ee address, will inc	
eewr_pp:		rcall	eewr		; ee write w/inc of ee address
				skip
eerd_pp:		rcall	eerd		; ee read w/inc of ee address also tests temp before return
inc_eeaddr:		adiw	xl,1	
				ret	

;--- ee write temp
eewr:		sbic	EECR,EEWE	; if EEWE not clear
			rjmp	eewr		; keep waiting

			out		EEARl,xl
			out		EEARH,xh
			out		EEDR,temp	; output the data

			in		temp,sreg	; save current global int status
			cli					; turn off ints for write
			sbi 	EECR,EEMWE	; set master write enable	
			sbi		EECR,EEWE	; set EEPROM Write strobe
			sbrc	temp,7		; if ints were off, leave them off
			sei
			rjmp	ee_end

;--- ee read , returns in temp
eerd:		sbic	EECR,EEWE	; if EEWE not clear
			rjmp	eerd		; keep waiting

			out		EEARl,xl
			out		EEARh,xh
			sbi		EECR,EERE	; set EEPROM Read strobe

ee_end:		in		temp,EEDR	; get data	
			out		EEARh,zero	; clear ee address to prevent data corruption
			out		EEARl,zero		
			ret 

;----
get_button:	lds		temp,_pb
			tst		temp
			breq	get_fail	

			sts		_pb,zero	; clear for next	
							
get_hit:	sec
			ret		

get_fail:	clc
			ret
	

;--- debounce push buttons vertical counter needs 4 identical samples to change state
;--- trash temp,temp2, zh,zl, button closures in ram @ _pb
debounce:	lds		temp,_debounced		; save  filtered data from last scan
			push	temp

			in		temp2,PB_PORT		; sample input pins
			andi 	temp2,1<<PB_1 | 1<<PB_2 	; mask off pins we don't care about
			
			
			lds		zh,_count_a			; get vertical counter from last sample
			lds		zl,_count_b
  
			eor		zh,zl				; increment the vertical counter
			com		zl
  		
			eor		temp,temp2			; temp still contains last state of debounced bins

			and		zl,temp				; reset the counter if no change has occurred
			and		zh,temp

			sts		_count_a,zh			; save vertical counter for next sample
			sts		_count_b,zl 

			or		zl,zh				; determine the counter's state
		
			lds		temp,_debounced
			and		temp,zl				; clear all bits that are filtered-or more accurately, save
			com		zl					; the state of those that are being filtered
			and		zl,temp2			; re-write the bits that haven't changed.
			or		temp,zl
										; retrieve pin states before this sample
			sts		_debounced,temp		; save debounced state
		
			pop		temp2				; get preroutine state
			eor		temp2,temp			; check for changes

			breq	db_done				; no changes

			com		temp				;				
			and		temp,temp2

			lds		temp2,_pb			; get events
			or		temp2,temp			; or in new events

			sts		_pb,temp2			; save it

db_done:	ret


;*********************************************************************
; codespace string storage / cmd table
;*********************************************************************
; 

;*********************************************************************
; codespace string storage 
;*********************************************************************
;--- message strings----------------


;*********************************************************************
; EEPROM 
;*********************************************************************
.eseg
.org			0x00

_empty:			.db	0x00							; we leave empty, may possibly get corrupted
_time_adjust:	.db	0x00
_hv_point:		.db	hv_reg_val