Data General NOVA ®
Input/Output Instructions

    This page describes the instructions which implement the Input/Output capabilities of the Nova. Other pages describe:

• Architecture Overview
• NOVA Program Load Example

• Arithmetic/Logic Instructions
• Memory Reference Instructions

    As mentioned quickly in the introduction page, the I/O architecture of the Nova is based around a model of 64 possible I/O devices (determined by the six address lines) each of which may contain up to three discrete registers which may be read from, or written to, by the CPU. In addition to these registers, each device must maintain single-bit status registers for "Busy" and "Done".

    Devices capable of interrupting the CPU have interrupt mask registers and interrupt latches. Devices which make use of the Nova's Data Channel facility are required to have memory address registers as well.

    Control over Nova I/O devices is excersized using the registers and three control lines, "Start", "Clear", and "Pulse" which are activated by bits set in the I/O instruction class.

    The I/O instructions all share a common format:

       0 1 1             Transfer           /----- Device Code --------\
   /           \       /          \        /                            \
   +---+---+---+---+---+---+---+---+---+---+----+----+----+----+----+----+
   | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 | 12 | 13 | 14 | 15 |
   +---+---+---+---+---+---+---+---+---+---+----+----+----+----+----+----+
               \      /            \       /
                  AC                Control

    The OPcode of each instruction is specified by its function and is defined by the ``Transfer'' field above. Instructions will be shown by their OPcode. The ``Control'' field specifies which control lines will be used when the instruction executes. The ``AC'' field states which, if any, AC will participate in a transfer.

    The I/O system operates in three modes. It is possible to perform a data transfer either to or from a device, perform no I/O but invoke commands, or to skip the following instruction based on the device's status bits. It is possible to invoke commands at the same time as a transfer is taking place.

    I/O device commands are appended to the base OPcode like the options on the ALC instructions. The ``control'' field is encoded thusly:

• 00 - do not activate any control line - ""
• 01 - start the addressed device - "S"
• 10 - Clear the addressed device - "C"
• 11 - Send a Pulse to the addressed device - "P"

    The "S" command "starts" an idle device by setting the "Busy" flag and clearing the "Done" flag. This action signals whatever peripheral is attached to it that something needs to be done (e.g. type out a character). When the device finishes, it clears the "Busy" flag and sets the "Done" flag and, if enabled, interrupts the CPU.

    The "C", or Clear, command performs the opposite. It is used to forcibly idle an active device by clearing both the "Busy" and "Done" bits.

    The "P", for Pulse is a third line whose use is defined by the device's interface designer. Typically it is only used in very complex devices (e.g. disks) and can be used to initiate a seek or force a recalibration and read in a bootstrap.

    The ``Control'' field also governs the operation of the machine when it is sensing status from the addressed device. This will be discussed below.

The Instructions

Data Input from register A (DIA)

Transfer code bits: 001

Function:

   The DIA instruction reads the contents of the "A" register in the device controller and places them into the accumulator specified by the AC field. The previous contents of the AC are lost.

Assembler Syntax:

DIA[S|C|P]    AC, Device

Example:

Start:    Device 25 Register A=172000, AC1=0, PC=50, Device active
Function: DIAC  1, 25
Finish:   Device 25 Register A=172000, AC1=172000, PC=51, Device idle

Data Output to register A (DOA)

Transfer code bits: 010

Function:

   The DOA instruction places the contents of the selected AC into the device controller register "A". The previous contents of the "A" register are lost. Commands may be invoked if coded.

Assembler Syntax:

DOA[S|C|P]    AC, Device

Example:

Start:    Device 10 Register A=72, AC1=7, PC=315, Device idle
Function: DOAS  1, 10
Finish:   Device 10 Register A=7, AC1=7, PC=316, Device active

Data Input from register B (DIB)

Transfer code bits: 011

Function:

   The DIB instruction reads the contents of the "B" register in the device controller and places them into the accumulator specified by the AC field. The previous contents of the AC are lost.

Assembler Syntax:

DIB[S|C|P]    AC, Device

Example:

Start:    Device 25 Register B=172000, AC1=0, PC=50
Function: DIB  1, 25
Finish:   Device 25 Register B=172000, AC1=172000, PC=51

Data Output to register B (DOB)

Transfer code bits: 100

Function:

   The DOB instruction places the contents of the selected AC into the device controller register "B". The previous contents of the "B" register are lost. Commands may be invoked if coded.

Assembler Syntax:

DOB[S|C|P]    AC, Device

Example:

Start:    Device 10 Register B=72, AC1=7, PC=315, Device idle
Function: DOBP  1, 10
Finish:   Device 10 Register B=7, AC1=7, PC=316, Device pulsed

Data Input from register C (DIC)

Transfer code bits: 101

Function:

   The DIC instruction reads the contents of the "C" register in the device controller and places them into the accumulator specified by the AC field. The previous contents of the AC are lost.

Assembler Syntax:

DIA[S|C|P]    AC, Device

Example:

Start:    Device 25 Register A=172000, AC1=0, PC=50, Device done
Function: DICS  1, 25
Finish:   Device 25 Register A=172000, AC1=172000, PC=51, Device active

Data Output to register C (DOC)

Transfer code bits: 110

Function:

   The DOC instruction places the contents of the selected AC into the device controller register "C". The previous contents of the "C" register are lost. Commands may be invoked if coded.

Assembler Syntax:

DOA[S|C|P]    AC, Device

Example:

Start:    Device 10 Register A=72, AC1=7, PC=315
Function: DOC  1, 10
Finish:   Device 10 Register A=7, AC1=7, PC=316

No I/O (NIO)

Transfer code bits: 000

Function:

   The NIO instruction causes the control lines to be activated in accordance with the contents of the ``control'' field. No data transfer takes place.

Assembler Syntax:

NIO[S|C|P]    Device

Example:

Start:    Device 27 idle
Function: NIOS  27
Finish:   Device 27 started

Skip if device busy (SKPBN)

Transfer code bits: 111, Control code bits: 00

Function:

   The SKPBN instruction inspects the status of the ``Busy'' bit in the device and causes the CPU to skip the next sequential instruction if that bit is non-zero. There is no AC involvement.

Assembler Syntax:

SKPBN    Device

Example:

Start:    Device 10 busy, PC=104
Function: SKPBN  10
Finish:   Device 10 busy, PC=106

Skip if device not busy (SKPBZ)

Transfer code bits: 111, Control code bits: 01

Function:

   The SKPBZ instruction inspects the status of the ``Busy'' bit in the device and causes the CPU to skip the next sequential instruction if that bit is zero. There is no AC involvement.

Assembler Syntax:

SKPBZ    Device

Example:

Start:    Device 15 busy, PC=210
Function: SKPBZ  15
Finish:   Device 15 busy, PC=211

Skip if device done (SKPDN)

Transfer code bits: 111, Control code bits: 10

Function:

   The SKPDN instruction inspects the status of the ``Done'' bit in the device and causes the CPU to skip the next sequential instruction if that bit is non-zero. There is no AC involvement.

Assembler Syntax:

SKPDN    Device

Example:

Start:    Device 33 done, PC=520
Function: SKPDN  33
Finish:   Device 33 done, PC=522

Skip if device not done (SKPDZ)

Transfer code bits: 111, Control code bits: 11

Function:

   The SKPDZ instruction inspects the status of the ``Done'' bit in the device and causes the CPU to skip the next sequential instruction if that bit is zero. There is no AC involvement.

Assembler Syntax:

SKPBZ    Device

Example:

Start:    Device 10 busy, PC=310
Function: SKPBZ  10
Finish:   Device 10 busy, PC=311

    This page described the Input/Output instructions of the Data General Nova minicomputer. Other pages describe:

• Architecture Overview
• NOVA Program Load Example

• Arithmetic/Logic Instructions
• Memory Reference Instructions

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