PDP-12 User's Manual

CHAPTER 3
LINC MODE PROGRAMMING

In LINC mode programming, each memory bank (Figure 3-1) is divided into four 1024-word segments. When a LINC mode program is in progress, two of these segments are active. The Instruction Field segments contains the executable program, and data which may be directly or indirectly addressed. The Data Field segment contains only indirectly addressable data. The fields are assigned to any two 1K segments by setting the 5-bit instruction Field and Data Field Registers, each of which can select one of up to 32 segments. The two fields need not be adjacent, in any particular order (either field can be above or below the other), or even in the same memory bank.

                         SEGMENT 

                0       1       2       3 
            +-------+-------+-------+-------+
            |       |       |       |       |
            | 0000- | 2000- | 4000- | 6000- | 
            | 1777  | 3777  | 5777  | 7777  |
            |       |       |       |       |
            +-------+-------+-------+-------+

With respect to the LINC program, addresses within a field remain constant, regardless of the field's actual location. Instruction Field Addresses run from 0000 through 1777: Data Field addresses run from 2000 through 3777. Thus, no matter where they are assigned, the two fields may be considered logically contiguous.

PROGRAM COUNTER

The Program Counter acts as a 10-bit counter in LINC mode, so that executable programs can be stored only in the Instruction Field. If the contents of PC_[2:11] are incremented beyond 1777, they return to 0000; the two high- order bits of the PC are unaffected. Thus, incrementing C(PC)= 3777 yields C(PC)= 2000. Likewise, 5777 increments to 4000, and 7777 to 6000. This 10- bit indexing is very common in LINC- mode operations.

INSTRUCTION AND DATA FIELD REGISTERS

These two 5-bit registers select the 1K segments to be used by the LINC program. The three high-order bits of each register identical with the three bits of the corresponding PDP-8 mode Memory Field register. The contents of the IF and DF may be set, changed, or examined at any time by the use of LINC instructions.

INSTRUCTION FIELD RESERVED LOCATIONS

This field contains the executable program The following registers are set side in this field for special uses:

0000 -

Holds return address after execution of JMP

0001 -

Holds horizontal coordinate during execution of DSC.

0001-0017 -

As B-registers, used by all indirect-reference instructions to hold the effective address of an operand.

0000-0017 -

As a-registers, used by SET, XSK, and DIS.

0020 -

Program start location when START 20 key is pressed.

0400 -

Program start location when START 400 key is pressed.

When the instruction field occupies the lowest segment of memory (that is, when C(IF) = 00), the following addresses are also reserved:

0140 -

Holds return address after an instruction trap.

0141 -

Location to which control is transferred after an instruction trap.

0040 -

Holds return address after a program interrupt during LINC mode.

0041 -

Location to which control is transferred after a program interrupt during LINC mode.

DATA FIELD RESERVED LOCATIONS

There are no specially-reserved registers in this field. Its contents cannot be accessed directly; data can be stored or retrieved only by indirect addressing.