In PDP-8 mode, all memory reference instructions have the same structure, shown in Figure 4-2. Note that only seven bits (5-11) are available for use as an address. This is just sufficient to give access to 128 registers, or exactly one page. The state of bit 4 of the instruction determines which of two possible pages the 7-bit page address references. If this bit is 1, the page address is on the current page, that is, the one in which the instruction itself is stored. If bit 4 is 0, the page address is on Page 0. Thus, a memory reference instruction has direct access to a total of 256 registers of memory; the 128 locations of Page 0, and those of the current page.
Examples:
To store the contents of the AC in register 150 of the current page:
To store the contents of the AC in register 150 of Page 0:
As one can see from these examples, it is useful to think of page addresses running from 000-177 on Page 0, and from 200-377 on the current page.
To gain access to registers outside of Page 0 or the current page, indirect
addressing must be used. If bit 3 of a memory reference instruction is set
to 1 (see Figure 4-2), the contents of the register designated by bits 4-11
are taken as the effective address of the operand. This is a full 12-bit
number which gives the absolute address of any register in the 4K memory bank.
Operation Memory
Code Page
/ \ / \
+---+---+---+---+---+---+---+---+---+---+----+----+
| 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 | 11 |
+---+---+---+---+---+---+---+---+---+---+----+----+
\ / \ /
Indirect \------- Page ------------/
Addressing Address
Figure 4-2. Memory Reference Instruction Format
In the following examples, as in normal PDP-8 programming, the letter "I" is used as a mnemonic to represent the presence of a 1 in bit 3.
Examples:
Absolute
Address Contents Action
0410 DCA I 300 /OCTAL CODE: 3700. THE
... /EFFECTIVE ADDRESS IS
0500 2100 /CONTAINED IN REGISTER 500,
/(PAGE ADDRESS 300)
Absolute Address Contents Action 0050 2100 /EFFECTIVE ADDRESS, STORED ... /ON PAGE 0 0410 DCA I 50 /OCTAL CODE: 3450. (BIT 4 = 0)
Bit 3 Bit 4 Effective Address
----------------------------------------------------------------------------
0 0 The operand is in Page 0 at the address specified by
bits 5 through 11.
0 1 The operand is in the current page at the address
specified by bits 5 through 11.
1 0 The absolute address of the operand is taken from
the contents of the location in Page 0 designated
by bits 5 through 11.
1 1 The absolute address of the operand is taken from
the contents of the location in the current page
designated by bits 5 through 11.
TABLE 4-1. SUMMARY OF ADDRESSING METHODS IN PDP-8 MODE
The eight registers in locations 10-17 of Page 0 have a special function when indirectly addressed. The contents of such a register are first incremented by 1, and the result is taken as the effective address of the operand. This autoindexing feature allows the programmer to address a series of contiguous locations without extra address modification, as shown in the following example.
Example:
To obtain the sum of 100 numbers stored in registers 1000-1077.
Address
Label Instruction Operation
GO, CLA /CLEAR THE AC
TAD LIST /PUT 777 IN AC (ADDRESS-1 OF THE TABLE OF NUMBERS
DCA 10 /DEPOSIT IN AUTOINDEX REGISTER 10. (CLEARS AC)
TAD COUNT /PUT -100 IN AC (COUNT OF ADDENDS IN TABLE)
DCA INDEX /DEPOSIT IN REGISTER FOR COUNTING
LOOP, TAD I 10 /C(10) INCREMENTED BY 1,THEN USED AS
/EFFECTIVE ADDRESS TO GET ADDEND FROM TABLE
ISZ INDEX /INCREMENT COUNT. IF RESULT IS 0000, SKIP
/THE NEXT INSTRUCTION.
JMP LOOP /IF NOT FINISHED, GO BACK TO GET NEXT ADDEND
END HLT /WHEN FINISHED, STOP: AC CONTAINS THE SUM
...
LIST 777 /ADDRESS-I OF TABLE OF ADDENDS
COUNT -100 /COUNT OF TABLE ENTRIES
INDEX 0000 /HOLDS COUNT DURING EXECUTION OF PROGRAM
When register 10 is first accessed, its contents are incremented from 777 to
1000, then used as the effective address to obtain the first addend. The
next time around the loop, the C(10) are again incremented by 1 to 1001, for
the next operand. At the end of the sequence, C(10)=1077.