Nova Programmer's Console
This is the basic operator's/programmer's console that was common to all the members of the early Nova line. The PC board behind the veneer was designed in the late 1960s (1968, I believe) and was in active production well into the early 70s.
The style changed later on in the Nova3 to resemble the Eclipse console .
Machine status is displayed on 2 rows of indicators (incandescent lamps on my specimens), and control over the machine's operation is exercised through the switches.
The top row of indicator lights on the main portion of the console display the current address contained in the PC (Program Counter). This is the address from which the next instruction or operand will be fetched from (or written to).
The second row of lamps displays the current contents of the memory data lines. These represent the contents of the data register on the currently selected memory board. The leftmost indicator in this row reflects the status of the carry bit in the ALU.
On the right hand side of the indicator panel are the machine status lights. These display the current state of the CPU. Two of these are status indicators: RUN (the machine is currently executing code from memory) and ION (Interrupts ON, or enabled, allowing the machine to be interrupted during execution). The other three are time state indicators: FETCH (the machine is getting an instruction or data from memory), DEFER (the CPU is performing indirect addressing), and EXEC (the CPU is executing the current instruction).
Programmer / operator interaction with the machine is through the various toggle switches on the console. The 16 DATA switches allow the operator to input arbitrary address and data items; the control switches below the data toggles allow the operator to exercise manual control over the machine's actions.
Four of the "control" switches allow the operator to examine or deposit values in the 4 accumulators. These are the left-most toggles in the control group; they are center neutral, momentary up/down for deposit/examine respectively.
Following from left to right, after the four accumulator toggles, is the RESET/STOP switch. STOP simply tells the CPU to exit the RUN state following the completion of the current instruction. RESET halts the machine immediately and resets the I/O and memory busses. A RESET press is irreversible; a stop press may be countermanded by a CONTINUE press.
Immediately to the right of RESET/STOP is START/CONTINUE. Pressing START commands the CPU to (1) load the PC (Program Counter) with the contents of the data switches, (2) send a RESET signal to the I/O bus, and (3) enter the RUN state. Depressing CONTINUE commands the CPU to continue execution following either a STOP press or a HALT instruction.
EXAMINE/EXAMINE NEXT allow the operator to query the contents of the main memory. EXAMINE loads the contents of the memory location specified by the data switches, and displays it in the DATA lights. This also loads the PC with said address. EXAMINE NEXT increments the address by one, loads the data at that address and displays said data in the DATA lights. The ADDRESS lights show the current address in memory.
DEPOSIT/DEPOSIT NEXT take a value from the DATA switches and deposit it into main memory. DEPOSIT places the data from the switches into the address currently in the PC (in this instance, loaded first via an EXAMINE press). DEPOSIT NEXT performs the same operation, but increments the PC by one before using the address.
MEMORY STEP/INST STEP are debugging tools. INST STEP advances the machine one instruction at a time, displaying the PC and current data status in the indicators. MEMORY STEP does the same thing, but instead of pausing at the end of each instruction, the machine pauses at the end of each memory access.
PROGRAM LOAD invokes the internal bootstrap loader included
in most Nova machines. This was an option, but I've never seen a machine
without it installed. The address of the I/O device is placed into the DATA
switches and the PROGRAM LOAD toggle operated to load an
initial program (usually another loader) into main memory. If a device is
connected via a Data Channel connection, bit 0 in the DATA switches is toggled
up as well.